1. Technical Field
Various embodiments generally relate to a semiconductor integrated circuit device and a method of manufacturing the same, and more particularly, to a semiconductor integrated circuit device with a surface and a method of manufacturing the same.
2. Related Art
Due to an increase in the integration degree of a semiconductor device, processes for forming fine patterns and multi-layered wirings are required. To form the fine patterns and the multi-layered wirings The photolithography process using a fine light source is necessary. Additionally, the global planarization of a wafer surface may be increasingly important to carry out the fine photolithography process.
Recently, planarization processes may include a chemical mechanical polishing (CMP) process. This CMP process is now widely used. The CMP process is a processing method whereby a chemical removing process and a mechanical removing process are integrated. The CMP process is a method used for planarizing a surface of a wafer with a slurry. The CMP may contain an abrasive and a chemical material. The slurry may be interposed between the wafer and a polishing pad.
However, due to chemical defects by the abrasive and the slurry, physical detects may be caused by pressure applied by the polishing pad, and the like. Particles and defects may be created and left on the wafer surface. An edge region of the wafer may be vulnerable to planarization.